High-Speed Modular multipliers Based on a New Binary Signed-Digit Adder Tree Structure
High-Speed Modular multipliers Based on a New Binary Signed-Digit Adder Tree Structure
复制标题
基于新型二进制有符号数字加法器树结构的高速模块化乘法器
DOI：
10.1142/s0218126613500436
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发表时间：
2013
期刊：
影响因子：
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通讯作者：
M. Zhang and S. Wei
中科院分区：
文献类型：
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作者：
M. Zhang and S. Wei
模乘是基于余数的实时计算系统中一种非常重要的算术运算。本文提出了一种改进的模m符号数（SD）加法器二叉树乘法器，其中m = 2n+ μ（μ = ± 1，0）.为了简化剩余SD加法器，使用新的加法规则来生成具有1位二进制编码数表示的中间和进位。通过使用新的编码方法，建议的剩余添加需要更少的硬件和更短的延迟时间比以前的。模m乘法器可以由深度为log2n的二进制模m加法器树来实现。为了引入具有新加法规则的二进制SD加法器树，本文提出了两种新的模m加法器。最后，评估显然表明，所提出的两种模m加法器的执行效率更高的模SD加法器，这是在我们以前的工作中提到的，并提出了一种新的二进制SD加法器树结构。
Modular multiplication is a very important arithmetic operation in residue-based real-time computing systems. In this paper, we present multipliers using a modified binary tree of the modulo m signed-digit (SD) number adders where m = 2n+ μ(μ = ±1, 0). To simplify the residue SD adder, new addition rules are used for generating the intermediate sum and carry with an 1-bit binary encoded number representation. By using the new encoding method, the proposed residue addition requires less hardware and shorter delay time than previous one. A modulo m multiplier can be implemented by a binary modulo m adder tree which has a depth of log2n. In order to introduce a binary SD adder tree with the new addition rules, two novel modulo m adders have been proposed in this paper. Finally, the evaluation apparently shows that the proposed two kinds of modulo m adders are performed more efficiency by comparing with the modulo SD adder which is mentioned in our previous work, and a new binary SD adder tree structure has been proposed.