Comparing SiC MOSFET, IGBT and Si MOSFET in LV distribution inverters

Comparing SiC MOSFET, IGBT and Si MOSFET in LV distribution inverters
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DOI:
10.1109/iecon.2015.7392188
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发表时间:
2015-07
期刊:
IECON 2015 - 41st Annual Conference of the IEEE Industrial Electronics Society
影响因子:
--
通讯作者:
N. Roscoe;Y. Zhong;S. Finney
N. Roscoe;Y. Zhong;S. Finney
中科院分区:
其他
文献类型:
--
作者:
N. Roscoe;Y. Zhong;S. Finney

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效率、电源质量和EMI是LVDC应用(如电源、EV充电或DC航空航天)的三个关键性能驱动因素。用于LVDC的SiC MOSFET和MMC的最新发展预示着LVDC逆变器性能的两个重大改进。然而,设计师有许多技术和逆变器级别的组合可供选择。本文旨在通过确定一个最佳Si设计和一个最佳SiC设计,使用详细的损耗计算来澄清这种选择。IGBT逆变器作为基线。损耗计算估计了Si MOSFET开关损耗和所有寄生互连损耗的影响。在一个Si MOSFET单元上进行的实验验证了损耗估计的有效性。密切的协议表明,建模方法是有效的扩展到许多电池串联,并并联连接的许多设备。尽管MMC逆变器固有的EMI较低,但由于反向恢复特性差,Si MOSFET面临更差的EMI风险。通过实验证明,减慢器件栅极开关可以降低开关噪声,从而保证极低的EMI。因此,这项初步研究确定了两个有前途的候选SiC和Si MOSFET逆变器,将在未来的工作中完全构建,以帮助设计人员选择最佳的半导体技术和拓扑结构的LVDC逆变器。
Efficency, power quality and EMI are three crucial performance drivers in LVDC applications such as electrical supply, EV charging or DC aerospace. Recent developments in SiC MOSFETs and MMC for LVDC promise two significant improvements in LVDC inverter performance. However, the designer is left with many combinations of technology and inverter level to choose from. This paper aims to clarify this choice by identifying one optimum Si design and one optimum SiC design, using detailed loss calculations. An IGBT inverter is included as a baseline. Loss calculations estimate the effects of Si MOSFET switching loss and all parasitic interconnection loss. The validity of the loss estimations are verified using careful experiments on a Si MOSFET cell. Close agreement indicates that the modelling approach is valid for extension to many cells in series, and to the parallel connection of many devices. Despite the lower EMI inherent in MMC inverters, Si MOSFETs risk worse EMI, due to poor reverse recovery characteristic. Slowed device gate switching experimentally demonstrates the reduction in switching noise, promising very low EMI. This initial study has therefore identified two promising candidate SiC and Si MOSFET inverters which will be fully constructed in future work, in order to aid designers in choosing the optimum semiconductor technology and topology for LVDC inverters.