One-transistor ferroelectric versatile memory: Strained-gate engineering for realizing energy-efficient switching and fast negative-capacitance operation
One-transistor ferroelectric versatile memory: Strained-gate engineering for realizing energy-efficient switching and fast negative-capacitance operation
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DOI:
10.1109/vlsit.2016.7573414
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发表时间:
2016-06
期刊:
影响因子:
--
通讯作者:
Y. Chiu;Chun‐Hu Cheng;Chun-Yen Chang;Ying-Tsan Tang;Min-Cheng Chen
中科院分区:
文献类型:
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作者:
Y. Chiu;Chun‐Hu Cheng;Chun-Yen Chang;Ying-Tsan Tang;Min-Cheng Chen
In this work, we report a ferroelectric versatile memory (FE-VM) with strained-gate engineering. The memory window of high strain case was improved by ~47% at the same ferroelectric thickness, which agrees with the increase of orthorhombic crystallinity. Based on a reliable first principle calculation (FPC), we clarify that the gate strain accelerates the phase transformation from metastable monoclinic to orthorhombic and thus largely enhances the ferroelectric polarization without increasing dielectric thickness. On the other hand, the orthorhombic FE-AFE phase transition plays a key role in realizing negative capacitance (NC) effect at high gate electric field. This 1T strained-gate FE-VM with ferroelectric NC achieves a sub-60-mVdec subthreshold swing (SS) over ~4 decade of ID to provide a 1~10 fA/μm Ioff and >108 Ion/Ioff ratio, which allows for a fast 20-ns P/E switching during 1012 cycling endurance.