SoC compatible 1 T1 C FeRAM memory array based on ferroelectric Hf0.5Zr0.5O2
SoC compatible 1 T1 C FeRAM memory array based on ferroelectric Hf0.5Zr0.5O2
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基于铁电 Hf0.5Zr0.5O2 的 SoC 兼容 1 T1 C FeRAM 存储器阵列
DOI:
10.1109/vlsitechnology18217.2020.9265063
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发表时间:
2020
期刊:
影响因子:
--
通讯作者:
T. Umebayashi
中科院分区:
文献类型:
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作者:
J. Okuno;Takafumi Kunihiro;Kenta Konishi;Hideki Maemura;Yusuke Shute;Fumitaka Sugaya;M. Materano;T. Ali;Kati Kuehnel;Konrad Seide;U. Schroeder;T. Mikolajick;M. Tsukamoto;T. Umebayashi
This paper experimentally demonstrates fundamental memory array operation of a ferroelectric HfO2-based 1 T1 C FeRAM. Metal/ferroelectric/metal (MFM) capacitors consisting of a TiN/ $\mathrm{Hf}_{0.5}\mathrm{Zr}_{0.5}\mathrm{O}_{2}(\mathrm{HZO}$)/TiN stack were optimized for a sub 500°C process. Structures revealed excellent performance such as remanent polarization $2\mathrm{P}_{\mathrm{r}} > 4\vert \mu\mathrm{C}/\mathrm{cm}^{2}$, endurance> 1011 cycles, and 10 years data retention at 85°C. Furthermore, the MFM capacitors were successfully integrated into a 64 kbit 1T1C FeRAM array including our dedicated circuit for array operation. Back-end-of-line (BEOL) wiring showed no degradation of the underlying CMOS logic. Program and read operation were properly controlled resulting in 100 % bit functionality at an operation voltage of2.5 Vand operating speed at 14 ns. This technology matches requirements of last level cash (LLC) and embedded non-volatile-memory (NVM) in low power System-on-a-Chip (SoC) for IoT applications.