A multilevel fingerprinting method for FPGA IP protection
A multilevel fingerprinting method for FPGA IP protection
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DOI：
10.1109/iscas.2013.6572212
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发表时间：
2013-05
期刊：
影响因子：
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通讯作者：
Tingyuan Nie;Yansheng Li;Lijian Zhou;M. Toyonaga
中科院分区：
文献类型：
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作者：
Tingyuan Nie;Yansheng Li;Lijian Zhou;M. Toyonaga
随着片上系统(SoC)设计中IP重用风险的增加，知识产权技术成为SoC设计中最重要的问题之一。与数字水印相比，指纹识别是一种更有效的方法，因为它既保护了知识产权所有者的利益，又保护了用户的权利。本文首先提出了一种用于知识产权保护的多层次指纹识别方法。在典型的现场可编程门阵列(现场可编程门阵列)设计流程中，我们首先通过操作LUT将水印嵌入到网表级的FPGA设计中。当IP核被编译成比特流文件时，来自IP用户的个人指纹被嵌入到FPGA的边缘。实验结果表明，该方法具有较低的资源和时间开销，同时具有较强的IP拥有者和用户证书。
With the increasing risk of IP reuse in System on Chip (SoC) design, intellectual property (IP) techniques becomes one of the most important issues. Compare with watermarking, fingerprinting is a more effective method because is not only protects the IP owner's benefits but also user's rights. In this paper, we firstly propose a multilevel fingerprinting method for IP protection. In the typical field programmable gate array (FPGA) design flow, we first embed the watermarks into a FPGA design at netlist level by manipulating LUTs. When the IP core is compiled into a bitstream file, an individual fingerprint from IP user is then embedded into margin of FPGA. The experimental results show that the method has low resource and timing overhead, while proves a strong certificate both of IP owner and users.