Monte Carlo Study of Ultimate Channel Scaling in Si and In$_{\rm 0.3}$Ga$_{\rm 0.7}$As Bulk MOSFETs
Monte Carlo Study of Ultimate Channel Scaling in Si and In$_{\rm 0.3}$Ga$_{\rm 0.7}$As Bulk MOSFETs
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Si 和 In$_{ m 0.3}$Ga$_{ m 0.7}$As Bulk MOSFET 终极沟道缩放的蒙特卡罗研究
DOI：
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发表时间：
2011
影响因子：
2.4
通讯作者：
K. Kalna
中科院分区：
文献类型：
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作者：
A. Islam;B. Benbakhti;K. Kalna
采用系综Monte Carlo器件模拟方法，对n型Si和In0.3Ga0.7As MOSFET的非平衡电子输运进行了详细的分析。该分析是基于ID-VG特性的模板，25 nm的栅极长度的硅MOSFET与以前的结果相比，从各种Monte Carlo器件代码的模拟，并为一个等效的25 nm的栅极长度In0.3Ga0.7As MOSFET。然后将晶体管从25 nm的栅极长度横向缩放到20、15、10和5 nm，监测在1.0 V的电源电压下沿沟道沿着的平均电子速度、能量和片密度。观察到注入速度随着栅极/沟道长度的缩放而降低。虽然我们已经发现对于小于10 nm的栅极长度，沿着Si沟道的整体电子速度分布沿着减小，并且注入速度从20 nm的栅极长度减小，但是由于漏极侧的速度增加，缩放过程中的本征漏极电流的增加是连续的。然而，InGaAs沟道MOSFET中的速度在缩放期间稳定地增加，但本征漏极电流的增加不太明显。这是由于III-V族半导体中的低态密度导致的源饥饿的结果，其不能在沟道中提供足够大的电子片密度。这种效应部分地通过增强态密度来减轻，因为源极/漏极中的电子的比例转移到具有较大电子有效质量的上谷。
A detailed analysis of nonequilibrium electron transport in n-type Si and In0.3Ga0.7As MOSFETs scaled into ultimate limit of 5-nm gate length is carried out using ensemble Monte Carlo device simulations. The analysis is based on simulations of ID-VG characteristics for a template, 25-nm gate length Si MOSFET compared against previous results from various Monte Carlo device codes, and for an equivalent 25-nm gate length In0.3Ga0.7As MOSFET. The transistors are then laterally scaled from a gate length of 25 nm to 20, 15, 10 and 5 nm monitoring the average electron velocity, energy, and sheet density along the channel at a supply voltage of 1.0 V. A degradation of the injection velocity with the scaling of a gate/channel length is observed. While we have found a decrease in the overall electron velocity profile along the Si channel for gate lengths smaller than 10 nm and a decrease in the injection velocity from a gate length of 20 nm, the increase in the intrinsic drain current in the scaling process is continuous thanks to the increasing velocity at the drain side. However, the velocity in the InGaAs channel MOSFETs increases steadily during the scaling but the increase in the intrinsic drain current is less pronounced. This is the result of a source starvation, due to a low density of states in III-V semiconductors, which cannot provide a large enough electron sheet density in the channel. This effect is partially mitigated by the enhancement of density of states as a proportion of electrons in the source/drain transfers to upper valleys with a larger electron effective mass.