Analytical cache modeling and tilesize optimization for tensor contractions
Analytical cache modeling and tilesize optimization for tensor contractions
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DOI:
10.1145/3295500.3356218
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发表时间:
2019-11
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通讯作者:
Rui Li;Aravind Sukumaran-Rajam;R. Veras;Tze Meng Low;F. Rastello;A. Rountev;P. Sadayappan
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作者:
Rui Li;Aravind Sukumaran-Rajam;R. Veras;Tze Meng Low;F. Rastello;A. Rountev;P. Sadayappan
Data movement between processor and memory hierarchy is a fundamental bottleneck that limits the performance of many applications on modern computer architectures. Tiling and loop permutation are key techniques for improving data locality. However, selecting effective tile-sizes and loop permutations is particularly challenging for tensor contractions due to the large number of loops. Even state-of-the-art compilers usually produce sub-optimal tile-sizes and loop permutations, as they rely on naïve cost models. In this paper we provide an analytical model based approach to multi-level tile size optimization and permutation selection for tensor contractions. Our experimental results show that this approach achieves comparable or better performance than state-of-the-art frameworks and libraries for tensor contractions.