NEURON MOS BINARY-LOGIC INTEGRATED-CIRCUITS .1. DESIGN FUNDAMENTALS AND SOFT-HARDWARE-LOGIC CIRCUIT IMPLEMENTATION
NEURON MOS BINARY-LOGIC INTEGRATED-CIRCUITS .1. DESIGN FUNDAMENTALS AND SOFT-HARDWARE-LOGIC CIRCUIT IMPLEMENTATION
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DOI:
10.1109/16.199362
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发表时间:
1993-03-01
影响因子:
3.1
通讯作者:
OHMI, T
中科院分区:
文献类型:
--
作者:
SHIBATA, T;OHMI, T
In this part of the paper, we describe the fundamental designing principles of binary-logic circuits using a newly developed highly functional device called Neuron MOS Transistor(nuMOS). NuMOS is a single MOS transistor simulating the function of biological neurons. In order to facilitate the logic design procedures employing this new-concept transistor, a graphical technique which we call Floating-Gate Potential Diagram has been developed. It is shown that any Boolean functions can be generated using a common circuit configuration of two-stage nuMOS inverters. One of the most striking features of nuMOS binary-logic application is the realization of a so-called Soft Hardware Logic Circuit. The circuit can represent any logic functions such as AND, OR, NAND, NOR, Exclusive-NOR, Exclusive-OR, etc., by adjusting external control signals without any modifications in its hardware configuration. The circuit allows us to build real-time reconfigurable systems. Test circuits were fabricated by a double-polysilicon CMOS process and their operations were experimentally verified.