A 1.6 GHz dual-core ARM Cortex A9 implementation on a low power high-K metal gate 32nm process
A 1.6 GHz dual-core ARM Cortex A9 implementation on a low power high-K metal gate 32nm process
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采用低功耗高 K 金属栅极 32 纳米工艺实现 1.6 GHz 双核 ARM Cortex A9
DOI：
10.1109/vdat.2011.5783620
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发表时间：
2011
期刊：
影响因子：
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通讯作者：
C. Hawkins
中科院分区：
文献类型：
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作者：
J. Koppanalil;Gus Yeung;Dermot O'Driscoll;Sean Householder;C. Hawkins
本文讨论了1.6 GHz双核Cortex-A9在低功耗高k金属栅极32nm CMOS批量工艺[1]上的实现细节和硅结果。该实现基于一个完全可合成的流程，利用ARM标准单元和内存IP。完整的设计包括功率门控和动态电压频率缩放功能，可实现低静态和动态功耗，并实现超过GHz+标称工作频率。本文将概述芯片架构，讨论在设计过程中遇到的实现和挑战，并介绍从功能硅测量的结果。
This paper discusses the implementation details and silicon result of a 1.6 GHz dual-core Cortex-A9 on a low power High-K Metal Gate 32nm CMOS Bulk Process [1]. The implementation is based on a fully synthesizable flow utilizing ARM Standard Cell and Memory IP. The completed design includes power gating and Dynamic Voltage Frequency Scaling capabilities for low static and dynamic power consumption and achieves beyond GHz+ nominal operating frequency. This paper will outline the chip architecture, discuss the implementation and challenges encountered during design and present results measured from the functional silicon.