An Advanced Fault Isolation System for Digital Logic
An Advanced Fault Isolation System for Digital Logic
复制标题
先进的数字逻辑故障隔离系统
DOI：
10.1109/t-c.1975.224251
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发表时间：
1975
影响因子：
3.7
通讯作者：
Carl T. Joeckel
中科院分区：
文献类型：
--
作者：
N. Benowitz;D. F. Calhoun;G. E. Alderson;J. E. Bauer;Carl T. Joeckel
集成电路技术的进步正在降低数字硬件的每种功能的获取成本，而系统软件成本正在增加。硬件的进步允许实际实施更复杂和更复杂的系统，这些系统具有较少的组件，但由于其复杂性，这可能会带来严重的测试和维护问题。因此，使用内置测试(BIT)硬件取代软件变得越来越有吸引力。海军资助的先进航空电子故障隔离系统(AAFIS)概念利用位逻辑对数字子系统和其中的故障模块进行经济有效的故障检测和故障隔离。先进的微电子技术以低成本提供的附加逻辑用于在每个子系统中执行测试模式生成，并在测试序列上对每个子系统模块上的输出和测试点进行编码。将编码的测试响应与预定常量进行比较。产生的模块合格-失败信号的或表示子系统故障，而模块故障信号的识别提供故障模块的隔离。给出了实用的编码技术，并在速度、测试效率和逻辑要求之间进行了权衡。BIT逻辑设计和仿真结果验证了BIT具有较高的故障检测率和适度的附加逻辑。
Advances in integrated circuit technology are decreasing acquisition cost per function of digital hardware while system software costs are increasing. The hardware advances allow practical implementation of more sophisticated and complex systems which have fewer components, but which may present severe test and maintenance problems due to their complexity. As a result, the use of built-in test (BIT) hardware in place of software becomes increasingly attractive. The Navy funded Advanced Avionics Fault Isolation System (AAFIS) concept utilizes BIT logic for cost-effective fault detection and fault isolation to a digital subsystem and to the faulty module therein. Added logic, available at low cost with advanced microelectronics, is used to perform test pattern generation in each subsystem and to code over the test sequence the outputs and test points on each subsystem module. The coded test response is compared to a predetermined constant. The OR of resulting module pass-fail signals indicates subsystem faults, while identification of a module fail signal provides isolation to a faulty module. Practical coding techniques are presented, with tradeoff of speed, test effectiveness and logic requirements for each. BIT logic design and simulation results verify high fault detection and moderate added logic for BIT.