Analog Layout Placement for FinFET Technology Using Reinforcement Learning

Analog Layout Placement for FinFET Technology Using Reinforcement Learning
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使用强化学习的 FinFET 技术的模拟布局布局

DOI:
10.1109/iscas51556.2021.9401562
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发表时间:
2021
期刊:
2021 IEEE International Symposium on Circuits and Systems (ISCAS)
影响因子:
--
通讯作者:
Lihong Zhang
Lihong Zhang
中科院分区:
--
文献类型:
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作者:
Mehrnaz Ahmadi;Lihong Zhang

文献摘要

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在模拟集成电路的物理设计过程中,尽管已经做出了各种努力来简化模拟版图的生成,但对设计者的专业知识的要求仍然很高。最近,一些努力开始利用人工智能(AI)来解决模拟布局优化的复杂性,并缓解设计过程中对设计师经验的高要求。然而,这些主要依赖于使用以前的设计的方法,对于AI训练中没有包括的看不见的数据(或场景)并不有效。本文提出了一种基于强化学习的模拟版图布局优化方法。它不仅适用于任何看不见的模拟布局场景,而且可以满足先进FinFET技术中模拟布局设计的要求。实验结果表明,与传统的分析方法(如共轭梯度法)相比,该方法可以在不影响优化精度的情况下,将模拟模块的布局速度提高77倍。
Despite all efforts being made to ease analog layout generation, the designers' expertise is still highly demanded in the process of analog IC physical design. Recently, some endeavors started to leverage artificial intelligence (AI) to tackle the complexity of analog layout optimization and alleviate the high demand for the designers' experience in the design process. However, these methods, which mainly rely on using the previous designs, are not effective to the unseen data (or scenarios) that were not included in the AI training. In this paper, we have proposed a reinforcement-learning-based method that can fully automate analog layout placement optimization. It is not only applicable to any unseen analog placement scenarios, but also can meet the requirements of analog layout placement designs in the advanced FinFET technology. Our experimental results show that the proposed method can place analog modules subject to the defined objectives 77x faster than the conventional analytical methods (e.g., conjugate gradient) without compromising the optimization accuracy.