Global Critical Path: A Tool for System-Level Timing Analysis
Global Critical Path: A Tool for System-Level Timing Analysis
复制标题
全局关键路径：系统级时序分析工具
DOI：
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发表时间：
2007
期刊：
影响因子：
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通讯作者：
S. Goldstein
中科院分区：
文献类型：
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作者：
Girish Venkataramani;M. Budiu;Tiberiu Chelcea;S. Goldstein
将优化工作集中在设计的最重要部分的有效方法是检查关键路径上的那些元素。传统上，关键路径定义在RTL级，即组合逻辑中时钟寄存器之间的最长路径。在本文中，我们提出了一种系统级时序分析技术来定义全局关键路径(GCP)的概念，用于预测系统级性能。我们展示了如何使用GCP作为一个理论和实践工具来理解、总结和优化高并发自定时电路的行为。我们正式定义了GCP，并展示了如何使用离散事件模型和硬件配置技术来构建GCP。GCP有助于深入了解电路的控制路径行为，并有助于发现系统级瓶颈。我们将GCP构建和分析框架整合到高级综合和仿真工具链中，从而实现了建模、分析和优化的完全自动化。
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is defined at the RTL level, as the longest path in the combinational logic between clocked registers. In this paper, we present a system-level timing analysis technique to define the concept of a global critical path (GCP), for predicting system-level performance. We show how the GCP can be used as a theoretical and practical tool for understanding, summarizing and optimizing the behavior of highly concurrent self-timed circuits. We formally define the GCP and show how it can be constructed using a discrete event model and hardware profiling techniques. The GCP provides valuable insight into the control-path behavior of circuits and in finding system-level bottlenecks. We have incorporated the GCP construction and analysis framework into a high-level synthesis and simulation toolchain, thus enabling complete automation in modeling, analysis and optimization.