Explicit expression and simultaneous optimization of placement and routing for analog IC layouts

Explicit expression and simultaneous optimization of placement and routing for analog IC layouts
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模拟 IC 布局布局布线的显式表达和同步优化

DOI:
10.1109/aspdac.2002.994964
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发表时间:
2002
期刊:
Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design
影响因子:
--
通讯作者:
M. Kawakita
M. Kawakita
中科院分区:
--
文献类型:
--
作者:
Yukiko Kubo;S. Nakatake;Y. Kajitani;M. Kawakita

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我们的目标是模拟电路布局的自动化,这是混合信号设计的瓶颈。我们制定明确考虑制造工艺的布局,并提出了一个算法,包括同时表达和优化的布局和布线。关键是所有的单元和线都用矩形表示。该算法被组合成一个商业工具,和性能说服我们,利用缩短了设计时间。
Our target is automation of analog circuit layout, which is a bottleneck in mixed-signal design. We formulate the layout explicitly considering manufacturing process, and propose an algorithm that consists of simultaneous expression and optimization of placement and routing. The key is that all the cells and wires are represented by rectangles. The algorithm is combined into a commercial tool, and the performance convinced us that the utilization shortens the design time.