Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay
Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay
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DOI：
10.1109/tcsi.2011.2143110
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发表时间：
2011-04
期刊：
影响因子：
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通讯作者：
Yan Wang;P. Hanumolu;G. Temes
中科院分区：
文献类型：
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作者：
Yan Wang;P. Hanumolu;G. Temes
新的实现技术，如使用直接电荷转移级，噪声耦合和动态元件匹配可以提高宽带ΔΣ adc的性能。然而，它们引入了额外的环路延迟，这损害了低失真特性甚至环路稳定性。本文展示了如何在环路滤波器中加入独立反馈和前馈分支来补偿额外的环路延迟，并恢复期望的信号和噪声传递函数。然后推广了不同类型ΔΣ adc的设计方法，并分析了其低失真特性。设计并仿真了两个宽带δ - σ adc来验证该理论。
Novel implementation techniques, such as the use of direct-charge-transfer stage, noise coupling, and dynamic element matching can improve the performance of wideband ΔΣ ADCs. However, they introduce extra loop delay, which compromises the low-distortion property and even the loop stability. This paper shows how the addition of independent feedback and feed-forward branches to the loop filter can compensate the extra loop delay, and restore the desired signal and noise transfer functions. The design methodology is then generalized for different kinds of ΔΣ ADCs, and the low-distortion property is analyzed. Two wideband delta-sigma ADCs have been designed and simulated to verify the theory.