Deterministic Memory Abstraction and Supporting Multicore System Architecture

Deterministic Memory Abstraction and Supporting Multicore System Architecture
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DOI:
10.4230/lipics.ecrts.2018.1
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发表时间:
2017-07
期刊:
2017 IEEE International Symposium on Workload Characterization (IISWC)
影响因子:
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通讯作者:
F. Farshchi;P. K. Valsan;R. Mancuso;H. Yun
F. Farshchi;P. K. Valsan;R. Mancuso;H. Yun
中科院分区:
其他
文献类型:
--
作者:
F. Farshchi;P. K. Valsan;R. Mancuso;H. Yun

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在实时系统社区中,多核心处理器的时间可预测性差一直是长期以来的挑战。在本文中,我们提出了一种基本问题,可以防止多核上有效且可预测的实时计算,这是缺乏适当的记忆抽象来表达记忆临界性,该记忆临界率跨系统的各个层次:应用程序,OS,OS,OS,和硬件。因此,我们提出了一种由新的内存抽象驱动的新的整体资源管理方法,我们称之为确定性记忆。确定性内存的关键特征在于,平台 - 操作系统和硬件 - 保证了小而紧密的最差内存访问时间。相比之下,我们将常规记忆抽象称为最佳记忆,其中只能实现高度悲观的最坏情况。我们建议利用这两种抽象来实现高时间可预测性,但没有显着牺牲绩效。我们介绍确定性内存感知的操作系统和体系结构设计,包括OS级别的页面分配器,硬件级缓存和DRAM控制器设计。我们在Linux和Gem5模拟器上实现了拟议的OS和架构扩展。我们使用一组合成和现实基准测试的评估结果证明了我们方法的可行性和有效性。
Poor time predictability of multicore processors has been a long-standing challenge in the real-time systems community. In this paper, we make a case that a fundamental problem that prevents efficient and predictable real-time computing on multicore is the lack of a proper memory abstraction to express memory criticality, which cuts across various layers of the system: the application, OS, and hardware. We, therefore, propose a new holistic resource management approach driven by a new memory abstraction, which we call Deterministic Memory. The key characteristic of deterministic memory is that the platform - the OS and hardware - guarantees small and tightly bounded worst-case memory access timing. In contrast, we call the conventional memory abstraction as best-effort memory in which only highly pessimistic worst-case bounds can be achieved. We propose to utilize both abstractions to achieve high time predictability but without significantly sacrificing performance. We present deterministic memory-aware OS and architecture designs, including OS-level page allocator, hardware-level cache, and DRAM controller designs. We implement the proposed OS and architecture extensions on Linux and gem5 simulator. Our evaluation results, using a set of synthetic and real-world benchmarks, demonstrate the feasibility and effectiveness of our approach.