High-performance ZnO nanowire transistors with aluminum top-gate electrodes and naturally formed hybrid self-assembled monolayer/AlO(x) gate dielectric.
High-performance ZnO nanowire transistors with aluminum top-gate electrodes and naturally formed hybrid self-assembled monolayer/AlO(x) gate dielectric.
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DOI：
10.1021/nn501484e
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发表时间：
2014-06
期刊：
影响因子：
17.1
通讯作者：
D. Kälblein;H. Ryu;F. Ante;B. Fenk;K. Hahn;K. Kern;H. Klauk
中科院分区：
文献类型：
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作者：
D. Kälblein;H. Ryu;F. Ante;B. Fenk;K. Hahn;K. Kern;H. Klauk
报道了一种用于高性能顶栅ZnO纳米线晶体管的低温混合栅介质的形成方法。混合栅介质由自组装单层（SAM）和氧化铝层组成。当铝栅电极通过热蒸发沉积到SAM覆盖的ZnO纳米线上时，薄的氧化铝层自然自发地形成，并且其形成由铝在疏水SAM上的不良表面润湿促进。该混合栅介质显示出优异的电绝缘性，可以承受高达6 V的电压。利用该混合栅介质的ZnO纳米线晶体管在3 V的栅源电压下具有50 μS的大导通电流和高达200 μA的大导通电流。亮度达到445 cd/m2。基于ZnO纳米线晶体管和薄膜碳负载电阻的逆变器工作频率高达30 MHz。
A method for the formation of a low-temperature hybrid gate dielectric for high-performance, top-gate ZnO nanowire transistors is reported. The hybrid gate dielectric consists of a self-assembled monolayer (SAM) and an aluminum oxide layer. The thin aluminum oxide layer forms naturally and spontaneously when the aluminum gate electrode is deposited by thermal evaporation onto the SAM-covered ZnO nanowire, and its formation is facilitated by the poor surface wetting of the aluminum on the hydrophobic SAM. The hybrid gate dielectric shows excellent electrical insulation and can sustain voltages up to 6 V. ZnO nanowire transistors utilizing the hybrid gate dielectric feature a large transconductance of 50 μS and large on-state currents of up to 200 μA at gate-source voltages of 3 V. The large on-state current is sufficient to drive organic light-emitting diodes with an active area of 6.7 mm(2) to a brightness of 445 cd/m(2). Inverters based on ZnO nanowire transistors and thin-film carbon load resistors operate with frequencies up to 30 MHz.