Lane recognition system implemented by a full hardware design
Lane recognition system implemented by a full hardware design
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全硬件设计实现的车道识别系统
DOI：
10.1109/isne.2014.6839353
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发表时间：
2014
期刊：
影响因子：
--
通讯作者：
M. Jeng
中科院分区：
文献类型：
--
作者：
Pin;Yen;M. Jeng
为了代替人眼做出正确的决策，机器视觉成为一个热门问题，尤其是在汽车应用领域。本设计提供基于友晶 DE2-70 FPGA 平台的高速车道识别，该平台包括 4.3” 触摸 LCD 和 500 兆像素 CCD 摄像头。通过完整的硬件设计，该系统可以轻松减少图像处理和识别时间。系统可以在 160 Km/hr 下实现较高的成功识别率。
In order to get a right decision instead of human eye, machine vision becomes a popular issue especially in the application field of automotive. This design provides a high speed lane recognition based on Terasic DE2-70 FPGA platform which included 4.3” touch LCD and a 500 Megapixel CCD camera. With full hardware design, this system can easily reduce the image processing and recognition time. The system with a relatively high rate of successful recognition under the 160 Km/hr can be achieved.