31.2 CIM-Spin: A 0.5-to-1.2V Scalable Annealing Processor Using Digital Compute-In-Memory Spin Operators and Register-Based Spins for Combinatorial Optimization Problems
31.2 CIM-Spin: A 0.5-to-1.2V Scalable Annealing Processor Using Digital Compute-In-Memory Spin Operators and Register-Based Spins for Combinatorial Optimization Problems
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31.2 CIM-Spin：使用数字内存计算自旋运算符和基于寄存器的自旋来解决组合优化问题的 0.5 至 1.2V 可扩展退火处理器
DOI：
10.1109/isscc19947.2020.9062938
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发表时间：
2020
期刊：
影响因子：
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通讯作者：
Bongjin Kim
中科院分区：
文献类型：
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作者：
Yuqi Su;Hyunjoon Kim;Bongjin Kim
基于伊辛模型收敛特性的退火处理器[1] - [3]为解决组合优化问题[4]提供了一种有吸引力的方法。最近开发的一种利用量子隧穿效应的退火处理器[1]使用128,000多个约瑟夫森结实现了2048个量子比特。然而，量子退火器的实际应用受到其超导电路运行所需的极低温度（15毫开尔文）以及相关的巨大功耗（25千瓦）的限制。或者，最近利用低成本CMOS工艺开发了基于模拟退火的低功耗退火处理器[2] - [3]。然而，先前具有基于静态随机存取存储器（SRAM）的自旋和系数存储器的退火处理器可扩展性有限，并且在能效和退火时间方面有很大的改进空间。在本文中，我们提出了一种基于内存计算自旋算子和基于寄存器的自旋的可扩展退火处理器，能够实现能效提高10倍以上以及更快的退火时间。
Annealing processors [1]–[3] based on the convergence property of the Ising model offer an attractive means for solving combinatorial optimization problems [4]. A recently developed annealing processor exploiting the quantum tunneling effect [1] implemented 2048 qubits using 128,000+ Josephson junctions. However, the practical application of quantum annealers is limited by the extremely low temperature (15mK) for operating their superconducting circuits and the associated huge power consumption (25kW). Alternatively, low-power annealing processors [2]–[3] based on the simulated annealing have been developed recently using low-cost CMOS processes. However, previous annealing processors with SRAM-based spin and coefficient memories have limited scalability, and there is a significant room for improvement in energy efficiency and annealing time. In this paper, we propose a scalable annealing processor based on compute-in-memory spin operators and register-based spins, enabling >10x higher energy-efficiency and faster annealing time.