Lost in Abstraction: Pitfalls of Analyzing GPUs at the Intermediate Language Level

Lost in Abstraction: Pitfalls of Analyzing GPUs at the Intermediate Language Level
复制标题

迷失在抽象中:在中间语言级别分析 GPU 的陷阱

DOI:
--
复制
发表时间:
2018
期刊:
International Symposium on High-Performance Computer Architecture
影响因子:
--
通讯作者:
Timothy G. Rogers
Timothy G. Rogers
中科院分区:
--
文献类型:
--
作者:
Anthony Gutierrez;Bradford M. Beckmann;A. Duțu;Joseph Gross;Michael LeBeane;J. Kalamatianos;Onur Kayiran;Matthew Poremba;Brandon Potter;Sooraj Puthoor;Matthew D. Sinclair;Mark Wyse;Jieming Yin;Xianwei Zhang;Akshay Jain;Timothy G. Rogers

文献摘要

参考文献

被引文献

相似文献

现代的GPU框架使用两阶段的汇编方法可用于学者的模拟器执行IL指令,因为与说明相关的功能状态大大降低,在某些情况下,机器ISA的功能状态知识产权可能不会在本文中公开披露,我们证明了使用此更高级别的抽象来评估GPU的陷阱,并证明只有在执行低级指令时可以看到几个重要的微体系交互。相同的应用程序代码和GPU微体系结构模型,执行行为将根据指令集抽象而显着不同例如,我们的分析表明,机器ISA的动态指令数几乎是IL的2×,但由于优化的资源利用率,向量寄存器的内容减少了3×。使用IL模拟指令提取,控制差异和价值相似性。真正硬件的运行时间。
Modern GPU frameworks use a two-phase compilation approach. Kernels written in a high-level language are initially compiled to an implementation agnostic intermediate language (IL), then finalized to the machine ISA only when the target GPU hardware is known. Most GPU microarchitecture simulators available to academics execute IL instructions because there is substantially less functional state associated with the instructions, and in some situations, the machine ISA’s intellectual property may not be publicly disclosed. In this paper, we demonstrate the pitfalls of evaluating GPUs using this higher-level abstraction, and make the case that several important microarchitecture interactions are only visible when executing lower-level instructions. Our analysis shows that given identical application source code and GPU microarchitecture models, execution behavior will differ significantly depending on the instruction set abstraction. For example, our analysis shows the dynamic instruction count of the machine ISA is nearly 2× that of the IL on average, but contention for vector registers is reduced by 3× due to the optimized resource utilization. In addition, our analysis highlights the deficiencies of using IL to model instruction fetching, control divergence, and value similarity. Finally, we show that simulating IL instructions adds 33% error as compared to the machine ISA when comparing absolute runtimes to real hardware.
DOI: --
发表时间: 2009
期刊: Scientific Reports
影响因子: 4.6
作者:
J. Xu
通讯作者: J. Xu