8.5 m/spl Omega/ /spl middot/ cm/sub 2/ 600-V double-epitaxial MOSFETs in 4H-SiC
8.5 m/spl Omega/ /spl middot/ cm/sub 2/ 600-V double-epitaxial MOSFETs in 4H-SiC
复制标题
8.5 m/spl Omega/ /spl middot/ cm/sub 2/ 600-V 双外延 MOSFET，采用 4H-SiC
DOI：
10.1109/led.2004.826538
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发表时间：
2004
影响因子：
4.9
通讯作者：
K. Arai
中科院分区：
文献类型：
--
作者：
S. Harada;M. Okamoto;T. Yatsuo;K. Adachi;K. Fukuda;K. Arai
实现4 H-SiC垂直MOSFET的最重要的问题是改善MOS界面处与高导通电阻相关的差的沟道迁移率。这封信的重点是一种新的4 H-SiC垂直MOSFET器件结构，其中低受主浓度外延层用作沟道。我们称这种结构为双外延MOSFET（DEMOSFET）。在该结构中，p阱由两个p型外延层组成，而p阱之间的n型区域通过低剂量n型离子注入形成。在上p/sup $/外延层的表面处形成掩埋沟道。制造的DEMOSFET在15 V的栅极电压和600 V的阻断电压下显示出8.5 m/spl Ω//spl middot/cm/sup 2/的导通电阻。该导通电阻是迄今为止报道的具有600 V阻断电压的垂直MOSFET的最低导通电阻。
The most important issue in realizing a 4H-SiC vertical MOSFET is to improve the poor channel mobility at the MOS interface, which is related to high on-resistance. This letter focuses on a novel 4H-SiC vertical MOSFET device structure where a low acceptor concentration epitaxial layer is used as a channel. We call this structure a double-epitaxial MOSFET (DEMOSFET). In the structure, the p-well is composed of two p-type epitaxial layers, while an n-type region between the p-wells is formed by low-dose n-type ion implantation. A buried channel is formed at the surface of the upper p/sup $/epitaxial layer. A fabricated DEMOSFET showed an on-resistance of 8.5 m/spl Omega//spl middot/cm/sup 2/ at a gate voltage of 15 V and a blocking voltage of 600 V. This on-resistance is the lowest so far reported for a vertical MOSFET with a blocking voltage of 600 V.