Architecture and Physical Implementation of Reconfigurable Multi-Port Physical Unclonable Functions in 65 nm CMOS-猫眼课题宝

DOI：

10.1587/transfun.e96.a.963

发表时间：

2013-05

期刊：

IEICE Trans. Fundam. Electron. Commun. Comput. Sci.

影响因子：

通讯作者：

中科院分区：

其他

文献类型：

作者：

Pengjun Wang;Yuejun Zhang;Jun Han;Zhiyi Yu;Yibo Fan;Zhang Zhang-Zhang

在现代密码系统中，物理不可克隆函数（PUF）是用于许多安全应用的有效机制，其提取内在随机物理变化以生成秘密密钥。经典的PUF主要表现出静态的挑战-响应行为并生成静态密钥，而许多实际的密码系统需要可重构的PUF，允许从同一电路中导出动态密钥。本文提出了可重构多端口PUFs的概念。RM-PUF不仅允许在没有物理替换的情况下更新密钥，而且还可以在一个时钟周期内从不同端口生成多个密钥。设计了一种基于异步时钟的实用RM-PUF结构，并采用TSMC低功耗65 nm CMOS工艺实现。测试芯片面积为1.1mm2，在1.2V电压下最高时钟频率为0.8GHz，在27 ℃下平均功耗为27.6mW。最后，测试结果表明，RM-PUF生成4个可重构的128位密钥，并且密钥在

SUMMARY In modern cryptographic systems, physical unclonable functions (PUFs) are efficient mechanisms for many security applications, which extract intrinsic random physical variations to generate secret keys. The classical PUFs mainly exhibit static challenge-response behaviors and generate static keys, while many practical cryptographic systems need reconfigurable PUFs which allow dynamic keys derived from the same circuit. In this paper, the concept of reconfigurable multi-port PUFs (RMPUFs) is proposed. RM-PUFs not only allow updating the keys without physically replacement, but also generate multiple keys from different ports in one clock cycle. A practical RM-PUFs construction is designed based on asynchronous clock and fabricated in TSMC low-power 65 nm CMOS process. The area of test chip is 1.1 mm 2 , and the maximum clock frequency is 0.8 GHz at 1.2 V. The average power consumption is 27.6 mW at 27 ◦ C. Finally, test results show that the RM-PUFs generate four reconfigurable 128-bit secret keys, and the keys are secure and reliable over a range of

Architecture and Physical Implementation of Reconfigurable Multi-Port Physical Unclonable Functions in 65 nm CMOS

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