Hardware design and implementation of DOA estimation algorithms for spherical array antennas
Hardware design and implementation of DOA estimation algorithms for spherical array antennas
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DOI：
10.1109/icspcc.2014.6986186
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发表时间：
2014-12
期刊：
影响因子：
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通讯作者：
Yuelei Xie;C. Peng;Xing Jiang;S. Ouyang
中科院分区：
文献类型：
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作者：
Yuelei Xie;C. Peng;Xing Jiang;S. Ouyang
为了满足高海拔平台（HAP）通信系统中到达方向（DOA）估计的需求，使用现场可编程门数组和数字信号处理器（FPGA + DSP）硬件架构的DOA估计器，用于16元素本文介绍了空中平台上的阵列。 AD9233以35m样本/s获取了16个通道接收到的中间频率（IF）信号，然后使用AlterA EP3C120F780环酮上的坐标旋转数字计算方法（cordic rot Computing（cordic）方法，使用坐标旋转数字计算方法（cordic旋转计算）完成了数字下降转换（DDC）模块和IQ解调模块III FPGA和多个信号分类（音乐）DOA估计算法，子阵列划分技术在Ti TMS320C6713浮点DSP上实现。硬件仿真表明，拟议的DOA估计器可以在实时计算和DOA估计准确性中实现更好的性能。
In order to meet the demands for direction of arrival (DOA) estimation in high-altitude platforms (HAPs) communication systems, a DOA estimator using field programmable gate array and digital signal processor (FPGA + DSP) hardware architecture for a 16-element spherical array on aerial platform is presented in this paper. The 16 channel received intermediate frequency (IF) signals are acquired by AD9233 at 35M samples/s, then the digital down conversion (DDC) module and IQ demodulation module are completed by using coordinate rotation digital computing (CORDIC) methods on the Altera EP3C120F780 Cyclone III FPGA, and a multiple signal classification (MUSIC) DOA estimation algorithm with sub-array divided techniques is implemented on the TI TMS320C6713 floating-point DSP. Hardware simulation shows that the proposed DOA estimator can achieve better performance in real-time computing and DOA estimation accuracy.