Evaluating programmable architectures for imaging and vision applications
Evaluating programmable architectures for imaging and vision applications
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评估成像和视觉应用的可编程架构
DOI：
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发表时间：
2016
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通讯作者：
M. Horowitz
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作者：
Artem Vasilyev;Nikhil Bhagdikar;A. Pedram;Stephen Richardson;Shahar Kvatinsky;M. Horowitz
计算成像和计算机视觉的算法正在迅速发展，硬件必须效仿：下一代图像信号处理器（ISP）必须“可编程”，以支持使用此工作中创建的新算法。 ISP体系结构，使用深色房间图像处理语言编写的应用程序。空间，以粗粒度重新配置的数组体系结构（CGRA），我们考虑了这两个基本体系结构的几个优化，例如用于SIMD的寄存器文件分区，基于总线的路由和管道的CGRA电线和线条缓冲后的台词。平均CGRA提供1.6倍更好的能源效率，1.4倍更好的计算密度与SIMD解决方案，而能源效率为1.4倍，计算3.1倍FPGA的密度。但是，提供一般编程的成本仍然很高：与ASIC相比，CGRA的能量和面积效率较低，如果排除了内存主导的应用程序，则该比率约为10倍。
Algorithms for computational imaging and computer vision are rapidly evolving, and hardware must follow suit: the next generation of image signal processors (ISPs) must be “programmable” to support new algorithms created with high-level frameworks. In this work, we compare flexible ISP architectures, using applications written in the Darkroom image processing language. We target two fundamental architecture classes: programmable in time, as represented by SIMD, and programmable in space, as typified by coarse grain reconfigurable array architectures (CGRA). We consider several optimizations on these two base architectures, such as register file partitioning for SIMD, bus based routing and pipelined wires for CGRA, and line buffer variations. After these optimizations on average, CGRA provides 1.6x better energy efficiency and 1.4x better compute density versus a SIMD solution, and 1.4x the energy efficiency and 3.1x the compute density of an FPGA. However the cost of providing general programmability is still high: compared to an ASIC, CGRA has 6x worse energy and area efficiency, and this ratio would be roughly 10x if memory dominated applications were excluded.