FPGA based phase detector for high-speed clocks with pico-seconds resolution
FPGA based phase detector for high-speed clocks with pico-seconds resolution
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基于 FPGA 的相位检测器，用于具有皮秒分辨率的高速时钟
DOI：
10.1109/nssmic.2013.6829780
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发表时间：
2013
期刊：
影响因子：
--
通讯作者：
C. Bohm
中科院分区：
文献类型：
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作者：
A. Hidvégi;P. Geßler;H. Kay;V. Petrosyan;G. Petrosyan;L. Petrosyan;A. Aghababyan;C. Stechmann;K. Rehlich;C. Bohm
许多应用需要某种类型的相位检测器来确定同步时钟之间的相位关系。欧洲的XFEL定时系统[1]，[2]，[3]利用大量的相位检测器来监控和保持时钟和触发器相位稳定。现代数字系统通常基于FPGA。这些FPGA也可以用作相位检测器，并适当考虑硬件和固件的设计。因此，基于FPGA的相位检测器已经被开发，通过欠采样时钟可以以高精度测量相对相位。这项工作介绍了基于FPGA的相位检测器的原理，描述了所涉及的众多挑战，讨论了其优点，但也有一些局限性，最后显示了一些测量结果。
Many applications require some type of phase detectors to determine the phase relation between synchronous clocks. The European XFEL timing system [1],[2],[3] utilizes numerous phase detectors to monitor and keep clocks and triggers phase stable.Modern digital systems are often based on FPGAs. These FPGAs could be used as phase detectors as well, with proper design considerations for the hardware and firmware. An FPGA based phase detector has therefore been developed that by undersampling the clocks can measure the relative phase with great accuracy. This work presents the principles of an FPGA based phase detector, describes the numerous challenges involved, discusses the benefits but also some of its limitations, and finally some measurement results are shown.