A sequence dependent challenge-response PUF using 28nm SRAM 6T bit cell
A sequence dependent challenge-response PUF using 28nm SRAM 6T bit cell
复制标题
使用 28nm SRAM 6T 位单元的序列相关质询响应 PUF
DOI：
10.23919/vlsic.2017.8008504
复制
发表时间：
2017
期刊：
影响因子：
--
通讯作者：
D. Blaauw
中科院分区：
文献类型：
--
作者：
Supreet Jeloka;Kaiyuan Yang;M. Orshansky;D. Sylvester;D. Blaauw
传统上，SRAM PUF仅用于芯片ID。所提出的序列相关PUF将SRAM PUF的挑战-响应空间扩展了行的顺序（序列长度-1），使其适合于认证。此外，它具有序列相关的非线性行为，使其更容易免受机器学习攻击。在28 nm波长下，基于64×64 SRAM的PUF的位面积为388 F2，能量范围为30 fJ/bit-88 fJ/bit（0.6V）。它还提供高吞吐量，在0.9V时从2.2Gbps到6.8Gbps。
Conventionally, SRAM PUFs are only used for chip ID. The proposed sequence dependent PUF expands the challenge-response space of an SRAM PUF by an order of rows(sequence length-1), making it suitable for authentication. In addition, it has a sequence dependent non-linear behavior making it more immune to machine learning attacks. In 28nm, the 64×64 SRAM-based PUF has a bit area of 388F2 with energy ranging from 30fJ/bit–88fJ/bit at 0.6V. It also provides high throughput, from 2.2Gbps to 6.8Gbps at 0.9V.