Collision Detection VLSI Processor for Highly-Safe Intelligent Vehicles Using a Multiport Content-Addressable Memory
Collision Detection VLSI Processor for Highly-Safe Intelligent Vehicles Using a Multiport Content-Addressable Memory
复制标题
使用多端口内容寻址存储器的高安全智能车辆碰撞检测 VLSI 处理器
DOI：
10.4036/iis.1999.109
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发表时间：
1999
期刊：
影响因子：
--
通讯作者：
M. Kameyama
中科院分区：
文献类型：
--
作者：
M. Hariyama;M. Kameyama
高速碰撞检测在高安全性车辆的碰撞预警系统中起着至关重要的作用。在碰撞检测中，需要高计算能力来执行障碍物的离散点与车辆之间的匹配操作。本文介绍了一种采用内容寻址存储器（CAM）进行并行匹配操作的碰撞检测VLSI处理器的设计。VLSI处理器由相同的CAM和用于坐标变换的处理元件（PE）组成。如果它们被充分利用，并且VLSI处理器的固定计算时间被作为约束给出，则VLSI处理器的面积最小化归因于CAM和PE的面积-时间乘积的最小化。为了减小CAM的面积时间积，提出了一种多端口CAM（MCAM）。存储在MCAM中的每个字在多个匹配单元之间共享，使得匹配操作可以与多个输入字并行执行，而不增加存储器容量。结果表明，使用4端口CAM的超大规模集成电路处理器的面积可以减少到43%，在没有他们的超大规模集成电路处理器的面积在时间约束下。
High-speed collision detection plays an essential role in a collision warning system for highly-safe vehicles. In collision detection, high computational power is required to perform matching operation between discrete points of obstacles and a vehicle. This paper presents design of a collision detection VLSI processor using content-addressable memories (CAMs) for parallel matching operation. The VLSI processor consists of identical CAMs and processing elements (PEs) for coordinate transformation. If they are fully utilized and the fixed computation time of the VLSI processor is given as a constraint, area minimization of the VLSI processor is attributed to minimization of the area-time product of the CAM and the PE. To reduce the area-time product of the CAM, a multiport CAM (MCAM) is proposed. Each word stored in the MCAM is shared between multiple matching units so that matching operation can be performed in parallel with multiple input words without increasing memory capacity. It is shown that the area of the VLSI processor using 4-port CAMs can be reduced to 43% in comparison with the area of the VLSI processor without them under a time constraint.