Improved two-stage DC-coupled gate driver for enhancement-mode SiC JFET
Improved two-stage DC-coupled gate driver for enhancement-mode SiC JFET
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用于增强型 SiC JFET 的改进两级直流耦合栅极驱动器
DOI：
10.1109/apec.2010.5433483
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发表时间：
2010
期刊：
影响因子：
--
通讯作者：
J. Casady
中科院分区：
文献类型：
--
作者：
R. Kelley;A. Ritenour;D. Sheridan;J. Casady
事实证明，常关 SiC VJFET 在各种应用中作为 MOSFET 和 IGBT 的“直接”替代品具有优势。随着该设备的接受度不断提高，开发人员正在研究优化的驱动器方法，以产生最佳的开关性能，从而提高系统效率。本文提出了一种替代且更优化的栅极驱动器的新结果，以替代过去文献中使用的电容耦合驱动器。此外，还记录了新优化的两级直流耦合栅极驱动器中 50mOhm 增强型 SiC VJFET 的开关能量测量结果，并与使用初始驱动器设计获得的过去结果进行了比较。其中包含特定的设计指南，用于使用此处介绍的两级栅极驱动器设计实现最佳结果。
Normally-OFF SiC VJFETs have been proved to be advantageous as a “drop-in” replacement of MOSFETs and IGBTs in a variety of applications. As this device's acceptance continues to grow, developers are investigating optimized driver methods that will yield the best possible switching performance leading to higher system efficiencies. This paper presents new results for an alternative and more optimized gate driver to the capacitive coupled driver used in past literature. Additionally switching energy measurements are documented for the 50mOhm enhancement-mode SiC VJFET in the newly optimized two-stage, DC-coupled gate driver and compared against past results obtained using the initial driver design. Specific design guidelines are included for achieving the best possible results using the two stage gate driver design presented here.