Vdd ramp testing for rf circuits
Vdd ramp testing for rf circuits
复制标题
射频电路的 Vdd 斜坡测试
DOI：
10.1109/test.2003.1270893
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发表时间：
2003
期刊：
影响因子：
--
通讯作者：
Rashid Amine
中科院分区：
文献类型：
--
作者：
J. P. D. Gyvez;G. Gronthoud;Rashid Amine
我们展示了适用于射频测试的静态电流测试技术的工业结果。操作方法包括使电源斜坡上升并观察相应的静态电流特征。当电源扫描时，所有晶体管都被迫进入不同的工作区域。这样做的优点是针对多个电源电压和相应的静态电流进行故障检测，以这种形式增强了故障的可检测性。我们发现，这种结构测试方法产生的故障覆盖结果与功能射频测试相当，由于其成本低、测试时间短和频率要求低，使其成为生产晶圆测试的潜在且有吸引力的技术。
We present industrial results of a quiescent current testing technique suitable for RF testing. The operational method consists of ramping the power supply and of observing the corresponding quiescent current signatures. When the power supply is swept, all transistors are forced into various regions of operation. This has as advantage that the detection of faults is done for multiple supply voltages and corresponding quiescent currents, enhancing in this form the detectability of faults. We found that this method of structural testing yields fault coverage results comparable to functional RF tests making it a potential and attractive technique for production wafer testing due to its low cost, low testing times and low frequency requirements.