Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor
Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor
复制标题
间歇性故障对精简指令集计算 (RISC) 微处理器可靠性的影响
DOI：
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发表时间：
2014
影响因子：
5.9
通讯作者：
P. Gil
中科院分区：
文献类型：
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作者：
J. Gracia;J. Baraza;D. Gil;L. J. Saiz;P. Gil
随着互补金属氧化物半导体（CMOS）技术的规模缩小到亚微米范围，设计人员必须处理越来越多的故障类型。这样，间歇性故障在现代超大规模集成电路（VLSI）中变得越来越重要。由于制造工艺的复杂性（产生残留物和参数变化）以及特殊的老化机制，这些故障的存在正在增加。这项工作提出了一个案例研究的间歇性故障的行为上的精简指令集计算（RISC）微处理器的影响。我们已经进行了详尽的可靠性评估，使用超高速集成电路硬件描述语言（VHDL）为基础的故障注入。通过这种方式，我们已经能够修改不同的间歇性故障参数，选择各种目标，甚至，间歇性故障与瞬态和永久性故障引起的影响进行比较。
With the scaling of complementary metal-oxide-semiconductor (CMOS) technology to the submicron range, designers have to deal with a growing number and variety of fault types. In this way, intermittent faults are gaining importance in modern very large scale integration (VLSI) circuits. The presence of these faults is increasing due to the complexity of manufacturing processes (which produce residues and parameter variations), together with special aging mechanisms. This work presents a case study of the impact of intermittent faults on the behavior of a reduced instruction set computing (RISC) microprocessor. We have carried out an exhaustive reliability assessment by using very-high-speed-integrated-circuit hardware description language (VHDL)-based fault injection. In this way, we have been able to modify different intermittent fault parameters, to select various targets, and even, to compare the impact of intermittent faults with those induced by transient and permanent faults.