Understanding the Effect of PCB Layout on Circuit Performance in a High-Frequency Gallium-Nitride-Based Point of Load Converter
Understanding the Effect of PCB Layout on Circuit Performance in a High-Frequency Gallium-Nitride-Based Point of Load Converter
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DOI：
10.1109/tpel.2013.2266103
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发表时间：
2014-04
影响因子：
6.7
通讯作者：
D. Reusch;J. Strydom
中科院分区：
文献类型：
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作者：
D. Reusch;J. Strydom
增强型氮化镓功率器件的引入，如eGaN FET，提供了比硅mosfet实现更高效率和更高开关频率的潜力。随着eGaN fet在开关性能和低寄生封装方面的改进，印刷电路板（PCB）布局成为转换器性能的关键。本文将研究PCB布局寄生电感对开关频率为1mhz、输入电压范围为12- 28v、输出电压范围为1.2 V、输出电流高达20a的eGaN fet负载点（POL）转换器效率和器件峰值电压应力的影响。本文还将比较传统PCB布局的寄生电感，并提出一种改进的PCB设计，提供比最佳传统PCB设计减少40%的寄生电感。
The introduction of enhancement-mode gallium-nitride-based power devices such as the eGaN FET offers the potential to achieve higher efficiencies and higher switching frequencies than possible with silicon MOSFETs. With the improvements in switching performance and low parasitic packaging provided by eGaN FETs, the printed circuit board (PCB) layout becomes critical to converter performance. This paper will study the effect of PCB layout parasitic inductance on efficiency and peak device voltage stress for an eGaN FET-based point of load (POL) converter operating at a switching frequency of 1 MHz, an input voltage range of 12-28 V, an output voltage of 1.2 V, and an output current up to 20 A. This paper will also compare the parasitic inductances of conventional PCB layouts and propose an improved PCB design, providing a 40% decrease in parasitic inductance over the best conventional PCB design.