Program specification and verification in VDM
Program specification and verification in VDM
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VDM 中的程序规范和验证
DOI:
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发表时间:
1987
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通讯作者:
Cliff B. Jones
中科院分区:
文献类型:
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作者:
Cliff B. Jones
Formal methods employ mathematical notation in writing specifications and use mathematical reasoning in justifying designs with respect to such specifications. One avenue of formal methods research is known as the Vienna Development Method. VDM has been used on programming language and non-language applications. In this paper, programming languages and their compilers are ignored; the focus is on the specification and verification of programs.