Development of Two-Step Deposition Process for Interface-Modified Ramp-Edge Josephson Junction with Low Sheet Inductance and Small Spread
Development of Two-Step Deposition Process for Interface-Modified Ramp-Edge Josephson Junction with Low Sheet Inductance and Small Spread
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低片电感和小扩散的界面改进斜坡边缘约瑟夫森结的两步沉积工艺的开发
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发表时间：
2002
期刊：
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通讯作者：
K. Tanabe
中科院分区：
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作者：
H. Wakana;S. Adachi;M. Horibe;Y. Ishimaru;Y. Oshikubo;Y. Tarutani;K. Tanabe
我们已经制作了界面修饰势垒的斜边结。为了满足单磁通量子电路的两个重要要求，即低的片状电感和小的结临界电流扩散(IC)，我们发展了对应层的两步沉积方法。新方法包括一次层和二次层两个沉积步骤。通过采用较大的靶-衬底距离来沉积第一层，以形成具有小扩散的适当的平均IC值的势垒。第二层以较小的靶基距离沉积，以获得具有较短磁穿透深度的高质量薄膜。采用两步法将对偶层4.2K时的片状电感从3.6p H/m2降至2.6p H/m2。对于百结串联阵列，特别是在较低的平均IC区域，利用该方法也改善了IC作为平均IC的函数的1σ分布。
We have fabricated ramp-edge junctions with interface-modified barriers. To satisfy both of the important requirements for single flux quantum circuits, i.e., low sheet inductance and small spread of junction critical current (Ic), the two-step deposition method for counter-layers has been developed. The new method consists of two deposition steps for primary and secondary layers. The primary layer is deposited by employing a larger target-substrate distance to form a barrier that providing an appropriate average Ic value with a small spread. The second layer is deposited at a smaller target-substrate distance to fabricate high-quality films with a shorter magnetic penetration depth. The sheet inductance at 4.2 K of the counter-layer was decreased from 3.6 pH to 2.6 pH per square by employing the two-step method. The 1σ spread of Ic as a function of average Ic for 100-junction series arrays was also improved by using this method, in particular, in the lower average Ic region.