A Variation Aware High Level Synthesis Framework
A Variation Aware High Level Synthesis Framework
复制标题
变化感知的高级综合框架
DOI：
10.1145/1403375.1403630
复制
发表时间：
2008
期刊：
影响因子：
--
通讯作者：
Yuan Xie
中科院分区：
文献类型：
--
作者：
Feng Wang;Guangyu Sun;Yuan Xie
在传统的高层综合中，功能单元的最坏情况延迟/功率被用于方便设计空间探索。随着技术扩展到纳米级，工艺变化的影响也在增加。在新工艺技术中遇到的可变性程度使得最坏情况分析不受欢迎，因为它可能导致意外的性能/功率差异或悲观的估计，并且可能最终使用多余的资源来保证设计约束。在本文中，我们提出了一个高层次的综合框架，以考虑功能单元的性能/功率变化。一个被称为参数产量的有效度量被定义为合成数据流图（DFG）满足性能和功率约束的概率，用于指导调度、模块选择和资源共享。一种高效的DFG性能/功率产率摄动计算方法显著提高了产率驱动的高阶综合算法的有效性。实验结果表明，我们的变化感知合成框架取得了显着的良率提高，并且与之前的方法相比，运行速度快了3倍。
The worst-case delay/power of function units has been used in traditional high level synthesis to facilitate design space exploration. As technology scales to nanometer regime, the impact of process variations increases. The degree of variability encountered in the new process technologies makes worst-case analysis undesirable, because it may result in unexpected performance/power discrepancy or a pessimistic estimation, and may end up using excess resources to guarantee design constraints. In this paper, we propose a high level synthesis framework to take into account of the performance/power variation for function units. An effective metric called parametric yield, which is defined as the probability of the synthesized data flow graph (DFG) meeting the performance and power constraints, is used to guide scheduling, module selection, and resource sharing. An efficient performance/power yield perturbation computation method for DFG significantly improves the effectiveness of our yield driven high level synthesis algorithm. The experimental results show that our variation-aware synthesis framework achieves significant yield improvements, and has much faster (3X) runtime speed compared against previous approach.
日本医疗体系与法国比较的思考（6）
DOI：
--
发表时间：
2008
期刊：
社会保険旬報 2008年11月1日号
影响因子：
--
作者：
姫野順一;北川勝彦;高橋泰
通讯作者：
高橋泰