Correlated Material Enhanced SRAMs With Robust Low Power Operation
Correlated Material Enhanced SRAMs With Robust Low Power Operation
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DOI：
10.1109/ted.2016.2621125
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发表时间：
2016-12-01
影响因子：
3.1
通讯作者：
Gupta, Sumeet Kumar
中科院分区：
文献类型：
--
作者：
Srinivasa, Srivatsa;Aziz, Ahmedullah;Gupta, Sumeet Kumar
我们提出了一种新的静态随机存取存储器（SRAM）单元采用相关材料（CM）薄膜与晶体管，以实现更高的读稳定性，写能力，和能源效率。所提出的SRAM单元的设计利用CM的绝缘相和金属相的电阻的数量级差异来减轻设计冲突。通过器件-电路协同设计，在SRAM操作过程中适当控制CM膜的相变，我们实现了比标准SRAM高30%的读静态噪声容限和36%的写容限。所提出的设计也导致了50%的泄漏电流减少，由于高绝缘状态的CM。这是以28%的读取时间代价实现的。我们还讨论了布局的影响，我们的技术和目前的技术，以维持没有面积开销。
We propose a novel static random access memory (SRAM) cell employing correlated material (CM) films in conjunction with the transistors to achieve higher read stability, write ability, and energy efficiency. The design of the proposed SRAM cell utilizes orders of magnitude difference in the resistance of the insulating and metallic phases of the CM to mitigate the design conflicts. By appropriately controlling the phase transitions in the CM films during SRAM operation through device-circuit codesign, we achieve 30% higher read static noise margin and 36% increase in the write margin over standard SRAM. The proposed design also leads to a 50% reduction in the leakage current due to high insulating state of the CM. This is achieved at 28% read time penalty. We also discuss the layout implications of our technique and present techniques to sustain no area overhead.