A 1.5 V-supply 200 MHz pipelined multiplier using multiple-valued current-mode MOS differential logic circuits
A 1.5 V-supply 200 MHz pipelined multiplier using multiple-valued current-mode MOS differential logic circuits
复制标题
使用多值电流模式 MOS 差分逻辑电路的 1.5 V 电源 200 MHz 流水线乘法器
DOI:
10.1109/isscc.1995.535570
复制
发表时间:
1995
期刊:
影响因子:
--
通讯作者:
M. Kameyama
中科院分区:
文献类型:
--
作者:
T. Hanyu;A. Mochizuki;M. Kameyama
This paper presents the design of a multiple-valued current-mode (MVCM) logic circuit with a low supply voltage for high-speed arithmetic systems at low power dissipation. A multiple-valued differential logic circuit (DLC) is used as a basic component to make a signal-voltage swing small yet driving capability large. The use of DLC enables high-speed operations with reduced device and interconnection counts at low power dissipation.