Smallest Vth variability achieved by intrinsic silicon on thin BOX (SOTB) CMOS with single metal gate
Smallest Vth variability achieved by intrinsic silicon on thin BOX (SOTB) CMOS with single metal gate
复制标题
通过具有单金属栅极的薄 BOX (SOTB) CMOS 上的本征硅实现最小的 Vth 变化
DOI：
10.1109/vlsit.2008.4588604
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发表时间：
2008
期刊：
影响因子：
--
通讯作者：
S. Kimura
中科院分区：
文献类型：
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作者：
Y. Morita;R. Tsuchiya;T. Ishigaki;N. Sugii;T. Iwamatsu;T. Ipposhi;H. Oda;Y. Inoue;K. Torii;S. Kimura
研制了一种具有50纳米单金属栅极（FUSI）的ldquoo - silicon on thin BOXrdquo (SOTB) CMOS。通过采用一个固有通道和一个金属栅极，这种SOTB实现了有史以来最小的Vth变异性。在相对较厚的EOT厚度为1.9 nm的情况下，NMOS和PMOS的SOTB测得的Pelgrom系数分别为1.8和1.5。多v控制和短通道效应的抑制都是通过简单地调整BOX层下的杂质浓度来实现的，同时保持通道几乎是固有的。采用双层偏置间隔器控制栅极重叠长度，优化了逆变器的延时和关断电流。结果表明，在平面型低功耗CMOS器件中，SOTB由于具有多vth的能力和良好的匹配特性，是最具可扩展性的器件。
A ldquosilicon on thin BOXrdquo (SOTB) CMOS with a 50-nm single metal (FUSI) gate has been developed. By employing an intrinsic channel and a metal gate, this SOTB achieves the smallest Vth variability ever reported. The measured Pelgrom coefficients of the SOTB were 1.8 and 1.5 for NMOS and PMOS, respectively, even in the case of relatively thick EOT of 1.9 nm. Both multi-Vth control as well as suppression of short-channel effects were carried out simply by adjusting the impurity concentration beneath the BOX layer while keeping the channel almost intrinsic. Inverter delay and off-current were optimized by controlling gate-overlap length by means of a dual-layer offset spacer. It is shown that, within planar-type low-power CMOS devices, the SOTB is the most scalable because of its capability of multi-Vth and excellent matching characteristics.