The evolution of standard cell libraries for future technology nodes
The evolution of standard cell libraries for future technology nodes
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DOI：
10.1007/s10710-011-9131-8
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发表时间：
2011-09
影响因子：
2.6
通讯作者：
James Alfred Walker;J. Hilder;D. Reid;A. Asenov;Scott Roy;C. Millar;A. Tyrrell
中科院分区：
文献类型：
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作者：
James Alfred Walker;J. Hilder;D. Reid;A. Asenov;Scott Roy;C. Millar;A. Tyrrell
进化硬件已经成为一门学科超过15年。它的应用范围从简单的电路设计到天线设计。然而，这一领域的研究经常因没有解决真实的世界问题而受到批评。固有可变性已被公认为半导体行业面临的主要挑战之一。本文介绍了一种方法，通过改变晶体管的尺寸，优化标准单元库内的设计。所提出的方法使用多目标遗传算法来优化标准单元内的器件宽度。使用统计增强的晶体管模型（基于3D原子模拟）和AnticulticalSpice模拟的设计进行分析。我们的目标是提取高速和低功耗设计，这些设计对当前和未来技术节点中存在的随机波动具有更大的容忍度。结果表明，优化的标准电池的速度和功率都有所改善，并且阈值电压变化的影响减小。
Evolvable Hardware has been a discipline for over 15 years. Its application has ranged from simple circuit design to antenna design. However, research in the field has often been criticised for not addressing real world problems. Intrinsic variability has been recognised as one of the major challenges facing the semiconductor industry. This paper describes an approach that optimises designs within a standard cell library by altering the transistor dimensions. The proposed approach uses a Multi-objective Genetic Algorithm to optimise the device widths within a standard cell. The designs are analysed using statistically enhanced transistor models (based on 3D-atomistic simulations) and statisticalSpicesimulations. The goal is to extract high-speed and low-power designs, which are more tolerant to the random fluctuations present in current and future technology nodes. The results show improvements in both the speed and power of the optimised standard cells and that the impact of threshold voltage variation is reduced.