OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs
OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs
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OpenFPGA：支持可定制 FPGA 快速原型设计的开源框架
DOI：
10.1109/fpl.2019.00065
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发表时间：
2019
期刊：
影响因子：
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通讯作者：
P. Gaillardon
中科院分区：
文献类型：
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作者：
Xifan Tang;Edouard Giacomin;Aurélien Alacchi;Baudouin Chauviere;P. Gaillardon
在数据处理应用的强烈需求的驱动下，现场可编程门阵列（FPGA）作为可编程加速器在现代计算系统中发挥着越来越重要的作用。为了充分释放特定领域应用的处理能力，FPGA架构必须经过定制，以便与其他计算资源无缝协作。然而，即使对于工业供应商来说，原型设计和生产定制的FPGA也是一项昂贵而复杂的奋进。在本文中，我们介绍OpenFPGA，一个开源框架，使快速原型定制的FPGA架构，通过半定制的设计方法。我们提出了一个XML到原型的设计流程，其中的Verilog网表的一个完整的FPGA结构可以自动生成使用的扩展的XML语言从VTR框架，然后送入一个后端流程，以生成生产就绪的布局。OpenFPGA还包括一个通用的Verilog-to-Bitstream生成器，用于XML语言描述的任何FPGA。我们展示了这种自动设计流程的能力与Stratix IV类FPGA架构，使用商业40纳米技术节点，并进行详细的比较，其学术和商业同行。与目前最先进的学术成果相比，我们的FPGA结构平均减少了1：75的面积和3的延迟。此外，OpenFPGA显著缩小了半定制设计的FPGA和完全优化的商业产品之间的差距，面积损失仅为60%，延迟损失仅为30%。
Driven by the strong need in data processing applications, Field Programmable Gate Arrays (FPGAs) are playing an ever-increasing role as programmable accelerators in modern computing systems. To fully unlock processing capabilities for domain-specific applications, FPGA architectures have to be tailored for seamless cooperation with other computing resources. However, prototyping and bringing to production a customized FPGA is a costly and complex endeavor even for industrial vendors. In this paper, we introduce OpenFPGA, an opensource framework that enables rapid prototyping of customizable FPGA architectures through a semi-custom design approach. We propose an XML-to-Prototype design flow, where the Verilog netlists of a full FPGA fabric can be autogenerated using an extension of the XML language from the VTR framework and then fed into a back-end flow to generate production-ready layouts. OpenFPGA also includes a general-purpose Verilog-to-Bitstream generator for any FPGA described by the XML language. We demonstrate the capability of this automatic design flow with a Stratix IV-like FPGA architecture using a commercial 40nm technology node, and perform a detailed comparison to its academic and commercial counterparts. Compared to the current state-of-art academic results, our FPGA fabric reduces the area by 1:75 and the delay by 3 on average. In addition, OpenFPGA significantly reduces the gap between semi-custom designed FPGAs and fully-optimized commercial products with a penalty of only 60% in area and 30% in delay, respectively.