Fabrication of Nano-Gap Electrode Pairs Using Atomic-Layer-Deposited Sacrificial Layer and Shadow Deposition
Fabrication of Nano-Gap Electrode Pairs Using Atomic-Layer-Deposited Sacrificial Layer and Shadow Deposition
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DOI：
10.1143/jjap.45.4293
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发表时间：
2006-05
影响因子：
1.5
通讯作者：
C. Park;Jungwook Lim;H. Yu;U. Pi;M. Ryu;Sung‐Yool Choi
中科院分区：
文献类型：
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作者：
C. Park;Jungwook Lim;H. Yu;U. Pi;M. Ryu;Sung‐Yool Choi
我们提出了一种新的制造工艺的纳米间隙电极对使用原子层沉积（ALD）牺牲层和阴影沉积技术。在该工艺中，间隙宽度可以通过ALD工艺的沉积循环的数量来精确控制，而结区域由第二电极材料通过第一电极顶部上的悬垂阴影掩模的沉积角度来限定。与我们先前的方法相比，工艺可靠性已经得到了极大的提高，因为完全防止了第二电极材料在第一电极的侧壁上的无意沉积。我们制备了10 ×10阵列的n型多晶硅（n-poly-Si）/Au纳米间隙电极对，间隙宽度分别为6和9 nm，在室温下显示出良好的绝缘性能。
We propose a new fabrication process of nano-gap electrode pairs using an atomic-layer-deposited (ALD) sacrificial layer and the shadow deposition technique. In this process, gap width can be precisely controlled by the number of deposition cycles of the ALD process, whereas junction area is defined by the deposition angle of the second electrode material through an overhanging shadow mask on top of the first electrode. In comparison with our previous method, process reliability has been highly improved because the unintentional deposition of the second electrode material on the sidewall of the first electrode is completely prevented. We have fabricated 10 ×10 arrays of n-type polycrystalline silicon (n-poly-Si)/Au nano-gap electrode pairs with gap widths of 6 and 9 nm, which show good insulating properties at room temperature.