ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using Reinforcement Learning
ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using Reinforcement Learning
复制标题
DOI：
10.1109/micro50266.2020.00058
复制
发表时间：
2020-09
期刊：
影响因子：
--
通讯作者：
Sheng-Chun Kao;Geonhwa Jeong;T. Krishna
中科院分区：
文献类型：
--
作者：
Sheng-Chun Kao;Geonhwa Jeong;T. Krishna
DNN加速器通过利用DNN计算中的激活/权重/输出来减少从DRAM到芯片的数据移动。分配片上硬件资源（即计算和内存）的策略给出了一个数据流，该数据流可以优化性能/能量，同时满足面积/功率的平台约束。感兴趣的DNN仍然相对出乎意料。通过详尽的搜索进行手动调整是不可行的。论文，我们提出了一种称为con-fuciux的自主策略，以找到给定模型和数据流样式的优化HW资源分配。循环估计我们还使用遗传算法来增强RL方法，以进一步进行微调。与其他技术相比，贝叶斯优化，遗传算法，模拟退火和其他RL方法比较优化的硬件配置4.7至24倍。
DNN accelerators provide efficiency by leveraging reuse of activations/weights/outputs during the DNN computations to reduce data movement from DRAM to the chip. The reuse is captured by the accelerator’s dataflow. While there has been significant prior work in exploring and comparing various dataflows, the strategy for assigning on-chip hardware resources (i.e., compute and memory) given a dataflow that can optimize for performance/energy while meeting platform constraints of area/power for DNN(s) of interest is still relatively unexplored. The design-space of choices for balancing compute and memory explodes combinatorially, as we show in this work (e.g., as large as O(1072) choices for running MobileNet-V2), making it infeasible to do manual-tuning via exhaustive searches. It is also difficult to come up with a specific heuristic given that different DNNs and layer types exhibit different amounts of reuse.In this paper, we propose an autonomous strategy called Con-fuciuX to find optimized HW resource assignments for a given model and dataflow style. ConfuciuX leverages a reinforcement learning method, REINFORCE, to guide the search process, leveraging a detailed HW performance cost model within the training loop to estimate rewards. We also augment the RL approach with a genetic algorithm for further fine-tuning. Con-fuciuX demonstrates the highest sample-efficiency for training compared to other techniques such as Bayesian optimization, genetic algorithm, simulated annealing, and other RL methods. It converges to the optimized hardware configuration 4.7 to 24 times faster than alternate techniques.