LPTest: a Flexible Low-Power Test Pattern Generator
LPTest: a Flexible Low-Power Test Pattern Generator
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LPTest：灵活的低功耗测试模式生成器
DOI：
10.1007/s10836-009-5115-5
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发表时间：
2009
期刊：
影响因子：
--
通讯作者：
Jiun
中科院分区：
文献类型：
--
作者：
Meng;Kai;Jiun
本文提出了一种低功耗的测试模式发生器，LPTest，最大限度地减少峰值功耗期间的移位和捕获周期的扫描为基础的固定和过渡故障测试。LPTest结合了功耗感知ATPG和低功耗X填充技术，以实现更高的功耗降低。它的使能技术是一种功率估计方法，该方法评估部分指定的测试模式的移入、移出和捕获功率的下限。下限估计方法用于LPTest的ATPG引擎、动态压实和X-filling。LPTest已经使用ISCAS 89基准电路进行了验证。当考虑所有周期时，与具有高合并比和随机填充选项的商业ATPG相比，LPTest在固定和过渡故障方面实现了超过22%的峰值WSA（加权开关活动）降低。同时，平均功耗降低优于43%。当仅关注捕获功率时，LPTest在固定和转换时可实现超过46%的WSA降低。
This paper presents a low power test pattern generator, LPTest, that minimizes the peak power consumption during the shift and capture cycles for scan-based stuck-at and transition fault testing. LPTest incorporates both power-aware ATPG and low-power X-filling techniques to achieve higher power reduction. Its enabling technique is a power estimation method which assesses the lower-bounds of the shift-in, shift-out, and capture powers of a partially specified test pattern. The lower-bound estimation method is utilized in LPTest’s ATPG engine, dynamic compaction, and X-filling. LPTest has been validated using ISCAS89 benchmark circuits. When considering all cycles, LPTest achieves better than 22% peak WSA (weighted switching activity) reduction for stuck-at and transition faults compared to a commercial ATPG with high merge ratio and random-fill options. Meanwhile, the average power reduction is better than 43%. When only capture power is of concern, LPTest attains more than 46% WSA reduction for stuck-at and transitions.