Fingerprinting techniques for field-programmable gate arrayintellectual property protection
Fingerprinting techniques for field-programmable gate arrayintellectual property protection
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DOI：
10.1109/43.952741
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发表时间：
2001-10
期刊：
影响因子：
--
通讯作者：
J. Lach;W. Mangione-Smith;M. Potkonjak
中科院分区：
文献类型：
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作者：
J. Lach;W. Mangione-Smith;M. Potkonjak
由于当前的计算机辅助设计(CAD)工具和超大规模集成技术能力创造了一个可重复使用的数字设计的新市场，这种新的基于核心的设计范例的经济可行性取决于知识产权保护技术的发展。这项工作提出了第一项利用现场可编程门阵列(FGA)的独特特性通过指纹识别来保护商业知识产权投资的技术。当数字电路被放置并布线到FPGA上时，隐藏的加密标记被嵌入到数字电路的物理布局中。该标记唯一地标识电路起源和原始电路接收者，但即使通过接收者共谋也很难检测和/或移除。虽然这种方法对电路布局和布线的后端CAD工具施加了额外的限制，但实验表明，这种方法对性能和面积的影响很小。
As current computer-aided design (CAD) tool and very large scale integration technology capabilities create a new market of reusable digital designs, the economic viability of this new core-based design paradigm is pending on the development of techniques for intellectual property protection. This work presents the first technique that leverages the unique characteristics of field-programmable gate arrays (FPGAs) to protect commercial investment in intellectual property through fingerprinting. A hidden encrypted mark is embedded into the physical layout of a digital circuit when it is placed and routed onto the FPGA. This mark uniquely identifies both the circuit origin and original circuit recipient, yet is difficult to detect and/or remove, even via recipient collusion. While this approach imposes additional constraints on the backend CAD tools for circuit place and route, experiments indicate that the performance and area impacts are minimal.