Improvement of Interface Circuit for Josephson/CMOS Hybrid Memories toward Ground-Current Reduction and Low Power Dissipation
Improvement of Interface Circuit for Josephson/CMOS Hybrid Memories toward Ground-Current Reduction and Low Power Dissipation
复制标题
约瑟夫森/CMOS混合存储器接口电路的改进以减少接地电流和低功耗
DOI:
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发表时间:
2013
期刊:
影响因子:
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通讯作者:
N. Yoshikawa
中科院分区:
文献类型:
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作者:
X. Peng;Y.Sasaki;Y. Yamanashi;N. Yoshikawa