High-Density Through Silicon Vias for 3-D LSIs
High-Density Through Silicon Vias for 3-D LSIs
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DOI：
10.1109/jproc.2008.2007463
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发表时间：
2009-02
影响因子：
20.6
通讯作者：
M. Koyanagi;T. Fukushima;Tetsu Tanaka
中科院分区：
文献类型：
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作者：
M. Koyanagi;T. Fukushima;Tetsu Tanaka
高密度硅通孔（TSV）是制造三维（3D）大规模集成电路（LSI）的关键。我们已经开发了用于3D集成的多晶硅（poly - Si）TSV技术以及钨（W）/多晶硅TSV技术。在多晶硅TSV的形成过程中，在硅沟槽表面被热氧化之后，将重度掺杂磷的低压化学气相沉积多晶硅保形地沉积到在硅衬底中形成的窄且深的沟槽内。在W/多晶硅TSV的形成过程中，在多晶硅沉积之后，通过原子层沉积法将钨沉积到硅沟槽中，其中多晶硅用作钨沉积的衬垫层。通过使用多晶硅TSV，成功制造了3D微处理器测试芯片、3D存储器测试芯片、3D图像传感器芯片以及3D人工视网膜芯片。
High density through silicon via (TSV) is a key in fabricating three-dimensional (3-D) large-scale integration (LSI). We have developed polycrystalline silicon (poly-Si) TSV technology and tungsten (W)/poly-Si TSV technology for 3-D integration. In the poly-Si TSV formation, low-pressure chemical vapor deposition poly-Si heavily doped with phosphorus was conformally deposited into the narrow and deep trench formed in a Si substrate after the surface of Si trench was thermally oxidized. In the W/poly-Si TSV formation, tungsten was deposited into the Si trench by atomic layer deposition method after the poly-Si deposition, where poly-Si was used as a liner layer for W deposition. The 3-D microprocessor test chip, 3-D memory test chip, 3-D image sensor chip, and 3-D artificial retina chip were successfully fabricated by using poly-Si TSV.