Asynchronous FPGA architectures
Asynchronous FPGA architectures
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异步 FPGA 架构
DOI：
10.1049/ip-cdt:19960655
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发表时间：
1996
影响因子：
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通讯作者：
R. Payne
中科院分区：
文献类型：
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作者：
R. Payne
现场可编程门阵列 (FPGA) 作为处理器支持设备以及作为其唯一权利的计算设备越来越重要。当前的同步 FPGA 架构给异步电路的实现带来了问题，因为它们会产生危险、信号重新排序以及缺乏仲裁。本文探讨了第一代异步 FPGA 架构（MONTAGE、PGA-STC 和 STACC）如何解决这些问题。
Field programmable gate arrays (FPGAs) are of increasing importance as processor support devices, and as computational devices in their only right. Current synchronous FPGA architectures create problems for the implementation of asynchronous circuits, due to their creation of hazards, reordering of signals and lack of arbitration. The paper examines how the first generation of asynchronous FPGA architectures (MONTAGE, PGA-STC and STACC) tackle these problems.