Aging analysis of circuit timing considering NBTI and HCI
Aging analysis of circuit timing considering NBTI and HCI
复制标题
考虑NBTI和HCI的电路时序老化分析
DOI：
10.1109/iolts.2009.5195975
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发表时间：
2009
期刊：
影响因子：
--
通讯作者：
Ulf Schlichtmann
中科院分区：
文献类型：
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作者：
Dominik Lorenz;G. Georgakos;Ulf Schlichtmann
我们提出了一个能够计算降解电路正时的老化分析流。据我们所知，这是迄今为止门上的第一种方法，能够分析两种与漂移相关的衰老效应的影响-NBTI和HCI对复杂数字电路的影响。用于计算老化电路正时的老化感知的栅极模型不仅提供了单元格延迟降解，还提供了输出斜率的降解。为了获得更准确的结果，可以考虑门的单个工作量。
We present an aging analysis flow able to calculate the degraded circuit timing. To the best of our knowledge it is the first approach on gate level so far capable of analyzing the impact of the two dominant drift-related aging effects - NBTI and HCI - on complex digital circuits. The aging-aware gate model used to compute the aged circuit timing provides not just the cell delay degradation, but also the degradation of the output slope. To get more accurate results, the individual workload of a gate can be considered.