Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance
Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance
复制标题
以资源效率和容错为目标的 MPSoC 自我优化
DOI：
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发表时间：
2009
期刊：
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通讯作者：
Christoph Puttmann
中科院分区：
文献类型：
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作者：
Mario Porrmann;M. Purnaprajna;Christoph Puttmann
提出了一种动态可重新配置的片上多处理器架构，它可以适应不断变化的应用需求和运行时检测到的故障。该可扩展架构由轻量级嵌入式 RISC 处理器组成，这些处理器通过分层片上网络 (NoC) 互连。可重构性以最小的面积和性能开销集成到处理器和片上网络中。该架构的适应性依赖于 MPSoC 在运行时的自我优化重新配置。基于 FPGA 和 ASIC 原型分析了所提出架构的资源效率。
A dynamically reconfigurable on-chip multiprocessor architecture is presented, which can be adapted to changing application demands and to faults detected at run-time. The scalable architecture comprises lightweight embedded RISC processors that are interconnected by a hierarchical network-on-chip (NoC). Reconfigurability is integrated into the processors as well as into the NoC with minimal area and performance overhead. Adaptability of the architecture relies on a self-optimizing reconfiguration of the MPSoC at run-time. The resource-efficiency of the proposed architecture is analyzed based on FPGA and ASIC prototypes.