A Multi-instruction Streams Extension Mechanism for SIMD Processor
A Multi-instruction Streams Extension Mechanism for SIMD Processor
复制标题
SIMD处理器的多指令流扩展机制
DOI：
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发表时间：
2017-11
影响因子：
1.2
通讯作者：
王耀华
中科院分区：
文献类型：
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作者：
彭元喜;周峰;海悦;王耀华
多媒体应用包含多分支循环，将它们映射到传统的单指令多数据（SIMD）结构效率较低。考虑到上述问题，我们针对传统SIMD结构提出了一种多指令流扩展方法。其主要思想是同时将多个指令流分配到多个通道。与通道接收统一的单指令流但通过通道掩码向量有条件执行的传统SIMD相比，多指令流扩展使其每个通道都能够接收并执行某一特定分支路径的指令。因此，将应用中的多分支循环进行映射效率较高。该设计最终通过Verilog语言实现，然后集成到FT - Matrix向量 - SIMD芯片中。应用性能分析结果表明，所提出的方法仅消耗2.61%的面积开销，同时获得了约1.8倍到2.4倍的性能提升。
Multi-media applications contain multibranches.loop, it is of low efficiency to map them into.traditional Single instruction multiple data (SIMD) structures..Considering the above matter, we proposed a multiinstruction.streams extension method for traditional SIMD.structures. The main idea is to simultaneously dispatch.multiple instruction streams to multiple lanes. Compared.with traditional SIMD whose lanes receive the unified single.instruction stream but execute conditionally through.a lane mask vector, Multi-instruction streams extension.grants each of its lanes the ability to receive and execute.the instructions of one particular branch path. Thus, it.is of high efficiency to map multi-branches loop in applications..The design is finally implemented through Verilog.language, and then integrated into the FT-Matrix.vector-SIMD chip. Application profiling results shows that.the proposed method consumes mere 2.61% area overhead.while obtains about 1.8x to 2.4x performance gain.