COOLMOS/sup TM/-a new milestone in high voltage power MOS

COOLMOS/sup TM/-a new milestone in high voltage power MOS
复制标题

DOI:
10.1109/ispsd.1999.764028
复制
发表时间:
1999-05
期刊:
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)
影响因子:
--
通讯作者:
L. Lorenz;G. Deboy;A. Knapp;Martin Marz
L. Lorenz;G. Deboy;A. Knapp;Martin Marz
中科院分区:
其他
文献类型:
--
作者:
L. Lorenz;G. Deboy;A. Knapp;Martin Marz

文献摘要

被引文献

相似文献

最近,推出了一种用于高压功率MOSFET的新技术:CoolMOS/sup TM/。基于电荷补偿的新器件概念,例如600 V晶体管的R/sub DS(on)/面积积已减少了5倍。该器件没有表现出双极电流的贡献,如众所周知的尾电流在IGBT的关断阶段观察。CoolMOS/sup TM/实际上将MOSFET的低开关损耗与IGBT的通态损耗相结合。此外,R/sub DS(on)/对击穿电压的依赖性已经被重新定义。在标准MOSFET的情况下,超过平方律的依赖性已被打破,并实现了线性电压依赖性。这为新的应用领域开辟了道路,即使没有雪崩操作。系统小型化、更高的开关频率、更低的电路寄生效应、更高的效率和更低的系统成本为未来的发展指明了方向。新技术不仅在降低R/sub DS(on)/值方面取得了突破,而且还为器件电容设定了新的基准。由于芯片收缩和新颖的内部结构,该技术既表现出非常小的输入电容,又表现出强非线性的输出电容。极低的栅极电荷促进并降低了可控性的成本,并且较小的反馈电容降低了动态损耗。通过这项新技术,所有封装中的最小R/sub DS(on)/值在重要的600-1000 V类别中被重新定义。
Recently, a new technology for high voltage power MOSFETs has been introduced: the CoolMOS/sup TM/. Based on the new device concept of charge compensation, the R/sub DS(on)/ area product for e.g. 600 V transistors has been reduced by a factor of 5. The devices show no bipolar current contribution like the well known tail current observed during the turn-off phase of IGBTs. CoolMOS/sup TM/ virtually combines the low switching losses of a MOSFET with the on-state losses of an IGBT. Furthermore, the dependence of R/sub DS(on)/ on the breakdown voltage has been redefined. The more than square-law dependence in the case of standard MOSFET has been broken and a linear voltage dependence achieved. This opens the way to new fields of application even without avalanche operation. System miniaturization, higher switching frequencies, lower circuit parasitics, higher efficiency, and reduced system costs are pointing the way towards future developments. Not only has the new technology achieved breakthrough at reduced R/sub DS(on)/ values, but new benchmarks have also been set for the device capacitances. Due to chip shrinkage and a novel internal structure, the technology shows both a very small input capacitance and a strongly nonlinear output capacitance. The drastically lower gate charge facilitates and reduces the cost of controllability, and the smaller feedback capacitance reduces the dynamic losses. With this new technology, the minimum R/sub DS(on)/ values in all packages are being redefined in the important 600-1000 V categories.