A macroscopic behavior model for self-timed pipeline systems
A macroscopic behavior model for self-timed pipeline systems
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DOI：
10.1109/pads.2003.1207429
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发表时间：
2003-06
期刊：
影响因子：
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通讯作者：
Shuji Sannomiya;Y. Omori;M. Iwata
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文献类型：
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作者：
Shuji Sannomiya;Y. Omori;M. Iwata
提出了一种新的自定时流水线宏观行为模型。STP是一种很有前途的系统级芯片（SoC）设计架构，因为STP缓解了时序问题，并放弃了构建组件之间的控制依赖性，以防止并行性和完整性。在早期的评估过程中，基于周期的模拟需要太长时间和太多的内存来调查STP的徘徊行为。从理论上讲，STP系统的吞吐量取决于占用率。这导致了我们新模型的产生，该模型仅管理数据包的位置和速度。我们的行为模型省略了管道中每个阶段的精确状态，以节省这些模拟成本。基于现有的朴素模型和我们的模型的模拟器显示出等效的结果，而后者比前者快约1.5至5倍。这两种模型都被应用到一个环形STP，这是用于真实的处理器的硬件实现。此外，成功地模拟了通过STP网络连接的执行图像处理的4个多处理器系统。
We present a novel macroscopic behavior model for self-timed pipeline (STP). STP is a promising architecture for system-on-chip (SoC) design, because STP eases the timing problems and abnegates the control dependencies among building components to prevent the parallelism and integrity. In earlier evaluation processes, a cycle-based simulation takes too long and too much memory to survey the wandering behavior of STP. From the theoretical point of view, throughput of a STP system depends on the occupied rate. This leads to the production of our new model, which only manages the position and velocity of packets. Our behavior model omits the precise status of each stage in a pipeline to save these simulation costs. Simulators based on the existing naive model and on our model show equivalent results, while the latter is about 1.5 to 5 times faster than the former. Both models are applied to a ring style STP which is used in real processor's hardware implementation. Also, a 4 multiprocessor system connected by STP network executing an image processing was successfully simulated.